Bit of CP/M trivia needed
ajp166 at bellatlantic.net
Mon Aug 29 15:09:58 CDT 2005
>Subject: Re: Bit of CP/M trivia needed
> From: "Dwight K. Elvey" <dwight.elvey at amd.com>
> Date: Mon, 29 Aug 2005 10:59:55 -0700 (PDT)
> To: cctalk at classiccmp.org
> I did tell a slight fib, there is truly not ROMs or
>PROMs in my IMSAI. There is no ROM code that runs on the
>8080 that gets the machine started. The controller does
>have PROMs in it but not for the 8080.
> The controller for the drives exist in the drive box.
>There is a bus interface card in the IMSAI. The controller
>is all TTL based and has several small PROMs to control
>sequencing for read/write/format operations. Only
>small additional states are needed to do the bootstrap.
>Mainly resetting registers and then doing a single sector
>read. On the IMSAI, to boot, all I do is a STOP, RESET.
>The drive reads the first sector that has the code to
>load the rest. I then execute from address 0000 and
>it brings up the rest of CP/M. All of the 8080 code
>exist on the disk ( I know this because I built up this
>implementation of CP/M my self from scratch ).
> The drive has the typical sounding name of "Digital
>Systems" on it. I was told that this was a common
>drive setup before FDC chips came in to being. The
>controller part was common to other small computer systems
>that used this controller with different bus interface
>cards. I don't know the date of my machine but I can
>look it up, next time I'm with my machine. I was told
>the controller design existed before S-100 and was one
>of the earliest types of controllers used on S-100 systems
>since it only required the bus interface card that
>is mostly just buffers and some logic to handle
>unique S-100 bus protocol.
> The controller is quite large. It covers the area of
>two 8 inch drives laying flat plus supply. When I got the
>machine, I had not disk at all. I also noted that there was
>no ROM in the IMSAI. After asking around, I found a
>friend that had schematics for the controller and interface
>card but no software. He'd had an early machine and
>had replaced his controller with a newer floppy controller
>card. I hand decoded the PROMs on the controller to determined
>how the state machine did its control of the drive.
>I then wrote my own bootstrap to load onto the first
>sector. I got a copy of CP/M2.2 from Gaby's web page.
>Of course, like many of these old machines, it also
>needed several replacement parts to get it going.
> I have since been in contact with another fellow that
>has one of these controllers and he had a boot disk!
>The code on it was almost identical to mine :)
> I'll look at the date codes of my machine, the next time
>I have access to it.
> So, in a sense, you are correct that there needs to be
>code someplace but all the reset does is clears the registers
>and starts the state machine that is the controller. The
>8080 does nothing until the first sector is loaded. Seeing
>how simple this was, I'm surprised that early FDC
>chips didn't include this ability. I guess it was that
>most didn't expect to be in DMA setups.
Ah, you answer a question. Actually I'd only seen one of those
and indeed they were very expensive and rare then and now. The
typical micro system of the day didn't have DMA due to the hardware
and associated cost. Not to forget that state machine is a simple
processor with a fixed program so it's cheating and right fine
hardware too. ;)
The DSD880 and RX01/02 drives are of a similar design with a local
CPU (crude TTL logic state hardware or 2901s) to do all the heavy
lifiting at that floppy interface end with a trivial interface
to the processor bus. Neither include boot logic.
As to DMA on FDCs well SMC did one that had it but it was a PITA
to use as every bus is differnt and timing plus control signals
required a lot of work to integrate. Most FDCs were trying to be
generic and to keep die size down (hence cost) things were not
done that would make the chip system specific.
Also FDC development from 1975 to 1980 was like CPUs, RAM and
Eproms. A constant progression of increased capability and
speed. The first parts (pre WD1771) were barely a sync USART
with AM detection and required considerable CPU handholding.
There were a few controllers that faked DMA by using a second FDC
and their value was they could load memory even if the main cpu was
locked up assuming Ram and the bus worked ok. But the board obviously
was a temporary master and had some code.
But if you want typical then look no further than the intel MDS. That
was the default lauching platform for from what I'd seen for 1.3, 1.4
and later. More than a few Altair and IMSAI users had to toggle in
a relatively short boot to get going.
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