FPGA VAX update

Paul Koning pkoning at equallogic.com
Thu Nov 3 08:49:26 CST 2005

>>>>> "Chuck" == Chuck Guzis <cclist at sydex.com> writes:

 Chuck> What surprises me about the home-built computers from scratch
 Chuck> is the lack of imagination when it comes to architecture.
 Chuck> Most are basically one-address-cum-accumulator designs.  It
 Chuck> would seem that larger register files are much easier to build
 Chuck> nowadays and would open up the door to some 2 and 3-address
 Chuck> designs.

 Chuck> I've always thought that 24 bits is a nice word size for a
 Chuck> small computer.  Divisible by 2, 3, 4, 6, 8 and 12 bits.  An
 Chuck> instruction could use 6 bits for opcode and 3 register
 Chuck> addresses out of a 64 register file...

Some Philips minis had 24 bit words.  I worked on one, can't remember
the model number.  P2400?  P9200?  Psomething anyway.  It had 8 sets
of 8 registers, one for each interrupt level, so there wasn't any
context saving overhead.  No interrupt vectors either; you'd simply
load the interrupt handler start address into the PC of that level.

But still, a boring architecture by your definition: registers plus
one memory address, plus an index bit.

If you're going to go the 3 address route, it sounds like you're well
on your way towards reinventing the CDC 6000 architecture.  And of
course that would be a fine thing to do -- if you're going to explore
computer architectures, what better path to take than the one first
walked by the foremost computer architecture genius of the 20th


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