FPGA VAX update, now DIY TTL computers

a.carlini@ntlworld.com arcarlini at iee.org
Thu Nov 3 13:08:04 CST 2005

Allison wrote:

> Parity required an extra bit to stor the parity so that it could be
> compared on read. That bit may or may not have been part of the data
> path logic. 

But on the memory chips, that bit must have been readable for the
system hardware to do its comparions. I guess that the memory could
send back a GO/NO_GO signal but supplying the parity bit must
be easier and cheaper?

There was a spate of "fake parity" memory around some time in
the 90s. Quite why it was cheaper to add a chip that always
supplied "correct" parity rather than simply using additional
memory was something that I never understood. But if you
end up with one these "fake parity" memories it may well
cause your 9-bit machine some issues!!



Antonio carlini
arcarlini at iee.org

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