ajp166 at bellatlantic.net
Mon Nov 14 13:53:02 CST 2005
>Subject: Re: semi-homemade micro
> From: Jim Battle <frustum at pacbell.net>
> Date: Mon, 14 Nov 2005 13:33:01 -0600
> To: General Discussion: On-Topic and Off-Topic Posts <cctalk at classiccmp.org>
>> Having got a new PC ... 2 GHZ??? who knows the real speed.
>> I have tried Spare time gizmos - pdp 8 emulator ( A minor bug
>> -- with windows how do you get the bell to sound ?).
>> I was running some sort of diagnostics and had the RTC displayed
>> and for about 10 minutes of real time, the clock advanced a hour.
>> That must be at least 6x faster than the real thing on this computer.
>If a 2 GHz (give or take) x86 CPU emulates a pdp 8 at 6x, it means either the
>code is inefficient, or the code contains a speed regulator that doesn't work
It's inefficient, there was no goal to be efficient only useful and interesting.
>The original PDP-8 took 10 clocks at 1 MHz to execute one instruction, a 2 GHz
>CPU has 20 million cycles to interpret one instruction. So at 6x realtime, the
>program is using 3.2 million cycles to interpret one instruction.
An 8e series was around 1.5uS core cycle time and some instructions took a
However it's timing at the macro level is easy. FETCH, execute as needed.
So to fetch a 12bit word and decide one of 8 major actions is pretty light
on code to do. The next step execute is tempered by addressing but thats
a minor calculation. OPR instructions you need more decisions and they
have a distinct sequence. Then the IOT, again it's all decided by the
device but for codes like 6000Q-6007Q and a few others the path is already
set. EMA adds overhead in all cases.
>Most likely speed and efficiency weren't goals of the emulator, so I bring this
>up not to discredit the program's author but rather to say: don't use that data
>point as anything but a lower limit on what kind of horsepower it would take to
>use a micro to emulate a PDP-8. I imagine an AVR device at 20-40 MHz should be
>able to emulate a PDP-8 at real time.
That may be possible. Keep in mind this type of emulation is almost like
building a microcode sequencer.
An alternate approach is a more hardware (ACC, Link, MQ, MAR, IR ALU
and shifter) and use a micro like 8048(or whatever) to controls the loads
and all and not execute arithmetic logical or register ops in the micro.
Speed there could exceed the 6100/6120 series cmos parts as the micro
is decoding instructions and controling events rather than calculating.
the differnce is your approaching the real thing hardware wise but
leaving out a lot of control logic (sequential or microded hardware).
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