FPGA VAX update

Brad Parker brad at heeltoe.com
Sat Oct 22 22:46:55 CDT 2005

Michael Sokolov wrote:
>There are only two practical choices when it comes to the actual target
>FPGA: A or X, which of course stand for Altera and Xilinx.  I would be
>content with either if I could work out a usable toolchain for it that
>would take me from EDIF (Icarus Verilog output) to the SOF or bitstream
>file (A/X respective terminology).

it's good to fight the good fight, but in the end you'll need to fit
your design into either X or A's part (I'd pick X) and you'll need to
use their tools to do it, which mean you'll use widows if it's something
of a small/reasonable design or unix if it's bigger.

I like the idea of holding out for something that will work in the PD
but I'm not sure you can do that today.  At some point you need to find
out if your design will "fit" into a particular part and you need to use
the right tool to find out.

We're talking "pre-synopsis" right now, but at some point you'll have to
graduate to "real tools".  It's just the nature of the game.  As you
know, the size of your design dictates what tools you'll need to use.

I'm going to guess that an entire vax dictates a certain footprint. I'm
curious to see what that is, as I'm about to try and jam a CADR into
several of X's parts :-)


More information about the cctalk mailing list