FPGA VAX update

Michael Sokolov msokolov at ivan.Harhan.ORG
Sun Oct 23 10:52:06 CDT 2005


Jos Dreesen <jos.mar at bluewin.ch> wrote:

> While not directly targetting X or A, a rather good set of
>   freeware tools for VLSI development is available at :
>
>
> http://www-asim.lip6.fr/recherche/alliance/

I'm well aware of Alliance and it's awesome, but it's for ASICs rather
than FPGAs.

The interesting question is whether the P&R function from Alliance could
be ported to an FPGA.  Suppose we found an FPGA for which we have a
complete definition of the routing fabric and configuration image format,
or obtained this information for some common commercial FPGA through
someone with the right connections or through reverse engineering.  We
would still need a P&R tool, which is a very major task.  I wonder if
the P&R function from Alliance could be adapted to the task.  But I don't
know any of the fundamental theory behind P&R in ASICs versus FPGAs to
know whether this could be done or if it's a totally different problem.

Now if we only had the bucks to fab a real chip instead of screwing with
FPGAs...  Then we could use Alliance and go completely open source from
start to finish.  Does anyone know how much does it cost to fab a chip?

MS



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