Q22 BUS parity check?

Charles H. Dickman chd_1 at nktelco.net
Wed Dec 13 17:13:37 CST 2006

9000 VAX wrote:

>  I read the Q22 specification (search "Q22 specification" on this page:
> http://www.chd.dyndns.org/qbus_ide/ ) but the parity check function is 
> still
> not clear to me.

Definitely not an expert (and since none have volunteered), I think that 
the parity check of the Qbus is an indication of a parity error rather 
than part of a parity check function.

The DEC Bus Handbook with a section on the LSI-11 bus says that BDAL17 
is parity check enable and BDAL16 is parity check error.


It says that on DATI cycles the bits are controlled by the peripheral. I 
make the assumption that asserting both during the data transfer phase 
will indicate a parity error that was detected in the peripheral and 
asserting only BDAL17 would indicate there was no error (but that parity 
was checked).

It further says that during DATO cycles asserting BDAL16 will write a 
parity error to memory and BDAL17 is not used on writes. I presume this 
would be for testing of some kind.


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