RL02 write faults, fixed it! Another cable mistake
charlesmorris at direcway.com
Fri Jan 6 12:03:38 CST 2006
On Fri, 06 Jan 2006 09:10:37 -0600 (CST), you wrote:
Re: my earlier finding, I think I was mistaken. The small glitches
arise because the slow risetime of the RC delay (6K8, .0056 uf) is
driving a 7404 that does not have a Schmitt trigger input. Guess
DEC figured it didn't matter since the first one would set the
write error latch anyway. Playing with terminating resistors made
little difference so I removed them.
Now it turns out that the write data is indeed not getting through
to the R/W board (at least today, I'm sure it was yesterday). Sure
enough E65 pin 4 (the output of the write data line receiver) was
not moving even though pins 1/2 (the differential data inputs)
were showing data, and pin 5 (enable) was going high for 5-6 uS
until the error latch set so there should have been that short a
burst of transitions on the WRITE DATA PLS L line.
A DVM showed a short to ground, or nearly so, on that line. I
started disconnecting things and the short went away, but then
returned. With the ribbon cable from the controller disconnected
at the logic board the short did not recur despite moving all the
connectors and flexing the board.
You may already have guessed it - "operator error" cable problems
again, %^&* it
The problem (as I discovered previously on the RL8E controller,
and should have remembered) with using IDC header connectors
instead of the Bergs is that the bare ends were protruding ever so
slightly beyond the connector body. And although I cut it flush
with a fine pair of cutters, there was just enough to (sometimes)
touch a via right under the header that had a little extra solder
plating "bump"... one strip of Scotch "33" heavy electrical tape
later and no more write faults.
The XXDP pack continues to pass all read tests but I don't want to
take a chance writing to it. The other pack did initialize,
20,000+ free blocks. After about 25 minutes of exercising a soft
read error occurred, then another (1 word of a sector) at 31
minutes. I've just written the "worst case data pattern" test from
ZRLMB1 diagnostic and there were one or two soft errors and an
"XFER" error. Probably the next move is to make a "Field Bad
Sector File" for that pack.
Anyway - let this be a warning to those of you who want to make
your own cables for RL drives. It looks easy since they are 40 pin
headers inside the drive and from the back of the controller - but
1) the pattern is reversed and 2) be very careful to keep the bare
cable end slightly recessed into the connector body.
However, I now know much more about RL drives than I care to, and
can fix the logic if it ever really does fail :)
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