More 11/45

[Pete Turnbull]

On Mar 31 2006, 18:16, Ethan Dicks wrote:

> Yes... the lowest trap vectors on _all_ PDP-11s are fixed and mean
> something special when you hit them.  I don't have a reference right
> in front of me (should be in all of the small computer handbooks),
but
> on a different spot on that page, it mentions this...
>
> Location	Contents        Opcode          Comment
>
> 	000004		000006				Bus Error trap
> 	000006		000000		halt
> 	000010		000012				Reserved
instruction trap
> 	000012		000000		halt
> 	000024		000026				Power fail trap
> 	000026		000000		halt
>
> ... so if you really are halting at 000004, sounds like a bus error.
> Perhaps the code you toggled in can't find an I/O register it's
> expecting.

No, if you have set up the standard trap catcher, and you halt at 4, it
loaded the vector from 0, executed the HALT instruction at 2, and the
PC contains 4 by the time it stops or returns to ODT.

-- 
Pete						Peter Turnbull
						Network Manager
						University of York