RL01 directory listings
Jerome H. Fine
jhfinedp3k at compsys.to
Mon Nov 27 16:40:46 CST 2006
>Jay West wrote:
> Another question - if under RT11 5.04, a disk pack shows "invalid
> directory"... doesn't that rule out RSX and RSTS packs? In other
> words, aren't those directories at least visible to RT11? I'm
> wondering what I can assume if a pack shows invalid directory under
> RT11 and isn't bootable with regards to the likelyhood I can consider
> it a scratch pack. I'd rather not init a pack that may contain
> something. Is there a better way to look?
Jerome Fine replies:
Without spending a few hours checking every place that
"invalid directory" is displayed from DIR.SAV, it is
impossible to understand exactly what triggers the message.
Also, I assume that you refer to using a hard disk drive
or other device that can be file structured.
However, I can say that the message is not caused when
DIR.SAV is unable to complete a read operation, but when
data is found that is different from what is expected.
(a) I zeroed out all of block one on a file structured
device - this did not cause a problem of any sort -
which contains non-essential RT-11 information
(b) I then zeroed out the number of segments (first word
in block 6 - this did cause the "invalid directory"
message - since a non RT-11 file structure likely can have
invalid data as far a what is required for RT-11, it
can be assumed that the RT-11 "invalid directory"
message is probable with other valid file structures
(c) The above result will obviously occur when a new
scratch device with all zeros in at least the first
8 blocks since the first word in block 6 is zero.
For example, under E11 it is possible to:
MOUNT DU0: RAM:/SIZE:65536 (65536 is the number of blocks)
If the user does not first INIT DU0:, then the DIR
command will return the "invalid directory" message
In short, if the "invalid directory" message appears, you
can NOT assume that the device is a scratch pack.
ALSO, Jay I have not yet figured out a suitable reply
to your private question. If it takes me more than a
week or two, please remind me again in case it has dropped
off my radar list. I have some personal family items to
finish first and they have priority.
One other thing:
I am attempting to assemble some x86 code for an Ersatz-11
DLL file. Since I am a dummy when it comes to even simple
x86 stuff, I don't know where to find a suitable x86 assembler,
let alone which one I should use. The Borland TASM.EXE file
was suggested from Turbo C, but my old AT is not working.
Can anyone help me find or provide a link to TASM and TLINK?
I want to write code under RT-11 which will trigger code on
a Pentium system that uses the x86 instruction BTR (Bit Test
and Reset) so that I can clear a specified bit in a string
of bits that is up to 4 GigiBits in length - so I can use
that bit string as my work area. Since there are a very large
number of bits to clear for the smaller primes (often more
than 10,000,000) in a work area of that size, it makes a very
efficient implementation if the DLL can clear all of them
with a single request before returning control to the RT-11
program, probably as efficient as writing the code in any
Also, just in case anyone knows, might it also be possible
with the 64 bit CPUs to operate on a bit string larger than
4 GigiBits with the BTR instruction? My limited understanding
of the manuals suggests that only a 32 bit address can be used -
although it would obviously be possible with additional code
to split the bit string into 2 portions. This question is
mostly for the future since with most Pentium 4 systems, the
maximum memory is only 4 GigiBytes and probably half of that
will be required for other values in any case.
Can anyone help?
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