Fast MBus modules

[Zane H. Healy]

At 2:29 AM -0400 8/1/07, Sridhar Ayengar wrote:
>Dave McGuire wrote:
>>On Aug 1, 2007, at 1:36 AM, Zane H. Healy wrote:
>>>>>I've been nice and stable with a pair of SM71's.  What I think 
>>>>>would be cool to try is a pair of the dual CPU boards for a quad 
>>>>>CPU system (I think they were 50Mhz).  I ran my SS20 like this 
>>>>>for quite some time before I upgraded to an UltraSparc based 
>>>>>system.
>>>>
>>>>   Those would be SM100s.  Made by Ross, Cypress chipset, 40MHz, 
>>>>no L2 cache, and ungodly slow.  A system with two SM51s will run 
>>>>rings around a system with two SM100s.
>>>
>>>Actually I was thinking of Sun's SM52, dual 50Mhz boards with I 
>>>believe 1MB cache.
>>
>>   Oh, THOSE...I thought they were only used in the SS1000?  Or am I 
>>getting them mixed up with another module?
>
>They might have only been *sold* in the SS1000, but I've definitely 
>run them in the SS20.  I suspect the configuration would probably be 
>called something similar to SS20/514.

They were for the SS10 and SS20, I'm not sure they'd even fit in the 
SS1000.  Each one filled a M-Bus slot, and the S-Bus slot directly 
next to it.

		Zane


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