Imagedisk 1.17
Allison
ajp166 at bellatlantic.net
Sat Jul 28 13:35:31 CDT 2007
>
>Subject: Re: Imagedisk 1.17
> From: "dwight elvey" <dkelvey at hotmail.com>
> Date: Sat, 28 Jul 2007 07:28:48 -0700
> To: cctalk at classiccmp.org
>
>
>
>
>>From: "Dave Dunfield" <dave06a at dunfield.com>
>>
>> > Ah, the step gremlin. It's an old 765(all!!!) problem. The problem is
>>when
>> > the step pulse is set to minimum acceptable for the drive it's possible
>>that
>> > due to internal timing of the 765 it can shorten the step timing of the
>> > first pulse by 1 count. If that occurs many drives seek badly and you
>>get
>> > read or write errors because your not where you thought you were.
>> > Note: some old drives due to the lubricants turning to goo will also
>>exhibit
>> > this type of error. There is one solution, step slower (SRT+1).
>>
>>A possibility - Christial, try using SR= to set the step rate slower.
>>
>Hi
>One other thing. Ususally one doesn't see this one but on a machine I
>put together, using a different processor, on one command I was
>able to beet the busy response of the controller chip. It was on only
>one command but I don't recall which command.
>If the PC is running the bus faster than the 765 is clocking, one can
>be too quick.
>I recall putting a short delay to make sure the status read was coorrect.
>I know it was this because I did an experiment that I'd read it twice.
>The second read was OK but not the first.
>Dwight
Yes, this can be the case as the 765 has a micro inside and it has a
finite timing delay and that's driven off the main clock which is
usually either 4 or 8mhz.
Allison
>
>_________________________________________________________________
>http://imagine-windowslive.com/hotmail/?locale=en-us&ocid=TXT_TAGHM_migration_HM_mini_2G_0507
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