Emulating old computers on FPGA

Philip Pemberton classiccmp at philpem.me.uk
Wed Jun 20 18:17:46 CDT 2007


Alexandre Souza wrote:
>    Phil, would you mind in sharing a bit of your knowledge?

Well, why the heck not. What's the use in hoarding knowledge anyway? :P

>    I have a "starter's kit" with a 9572 but just cannot understand how 
> do I begin to make things work. Found no good tutorial on net. Would you 
> mind helping me (and possibly others on/off this list) in "how to begin 
> playing with CPLDs?

First off, the 9572 is a pretty basic chip. You're not going to get a CPU into 
it (unless you're thinking along the lines of that Motorola 1-bit "industrial 
controller IC" thing) but you can handle address decoding and so forth with 
it. They're great for high-ish speed data acquisition, and bolting onto PIC 
microcontrollers to take some of the load off the MCU.

What you need to get started is:
   - The Xilinx ISE-WebPack development kit. Grab this from www.xilinx.com, 
it's free and runs on Windows or Linux (though the Windows version is a bit 
more stable). Do the web-install if you like, but I usually download the "full 
install" pack (10MBit internet, doesn't take long :P) and install offline.
   - A Xilinx JTAG cable. I use a homebrew clone of the Parallel Cable III, 
which is sluggish but perfectly usable.
   - A bit of spare time to learn a HDL language.

To start with, work through the Xilinx tutorials (open ISE, Help -> ISE 
Manuals -> Tutorial, IIRC). The schematic entry workflow is the easiest to 
learn with (assuming you know a bit about digital logic in general - what the 
different gates do, etc).

Once you've learned the schematic stuff, pick a HDL. If you know C, you'll 
probably find Verilog easier to learn. I tried to learn VHDL first, gave up, 
then switched to Verilog and found it much easier. YMMV. Google for "Verilog" 
or "Verilog HDL" and work through some of the tutorials.

Seichi Inoue's website (http://www.hobby-elec.org/e_menu.htm) is worth a look. 
  He uses VHDL, but there's a lot of stuff on there about the HDL-to-CPLD 
workflow.

If you want, I'll get the microphone set up tomorrow and do a little Screencam 
recording of a quick barrel shifter design in ISE, including the programming 
stage and a quick breadboard demo (assuming I can find my A710iS digicam).

-- 
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classiccmp at philpem.me.uk      | (='.'=) into your signature to help him gain
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