aclo dclo (11/45) flustered-ness

Jay West jwest at
Thu Mar 29 14:04:02 CDT 2007

I've been looking at various documentation and have come up lacking in 

Can some one clue me in on the source, behaviour, and routing of the ACLO 
DCLO signals on the 11/45 - with expansion boxes? In my digging in the 
documentation I seem to be finding contradictions between various printed 
sources and advice from people as well. Likely they are all right and I just 
don't "get it".

>From what I can gather, it appears that ACLO originates in the H742 power 
supply. Actually, it appears that both the upper and lower H742's produce 
ACLO and DCLO. I think Tony was saying that ACLO and DCLO on the lower H742 
shouldn't be used because they are referenced to -15v instead of ground. But 
from what I can gather, the only signals on the lower H742 which should not 
be used because of the 15v to ground change, are LTC and +8v. The lower H742 
produces both ACLO and DCLO, and does route them out for use in several 

It appears that ACLO originates only in the power supply, and both the cpu 
and cards on the unibus monitor it to know if "death is coming". I would 
imagine that the cpu uses it to trap to a powerfail routine, and peripheral 
interfaces use it to do things like an emergency head unload on a disc 
drive, etc. So, what about when the unibus has been extended into an 
expansion box like the KB11-F with a DD11-DK, which has it's own supplies 
and thus it's own ACLO? Is the ACLO failure in the external expansion box 
given to the cpu chassis box and vice versa or are they entirely separate?

DCLO also confuses me. Some things I read (and advice from some people) 
indicate it originates in the power supplies, and other devices only monitor 
that signal. However, the unibus interfacing manual states clearly that ANY 
device on the unibus can assert the DCLO signal. This would mean not just 
the power supply, but a controller like an RX02 interface (M8256) could tell 
the rest of the system "hey, I'm losing power".

This gets back to my "RL02 faulting upon spinup only if the RX02 is turned 
on" problem. Tony suggested checking ACLO and/or DCLO. Note that my RL02 and 
RX02 controllers are in the expansion BA11-K, not the cpu box. To do this, I 
need to know exactly what pins to look at on the backplane. I figured I 
could track this down myself, but in going through all the documentation I 
am left very unclear as to exactly where the ACLO & DCLO signals go after 
they hit the power distribution board (J2-J10 I think it is) at the top of 
the system unit backplane. Since it is a unibus signal, I would think it 
would enter the DD11-K in the expansion box at the "unibus in" (slot 1AB). I 
would also guess that since (apparently) SPC cards are capable of monitoring 
ACLO/DCLO (and perhaps asserting DCLO? See above?) that those two signals 
would be wire wrapped from somewhere on 1AB to each of the SPC slots (C-F).

Some documentation showed ACLO and DCLO on row C (some docs show only one of 
those is present) of an SPC slot. If that is the case, should I not see some 
wire wrapping on my DD11-K that shows ACLO/DCLO (supposedly on B01F1 and 
B01F2) getting wrapped to somewhere on row C, and daisychaining to all the 
SPC slots on that same pin so they can monitor it? I do not see that wire 
wrap on the DD11-DK.

So someone could just tell me what pin to check, to see if ACLO or DCLO is 
acting funny around my RX02 controller. But I'd really prefer to understand 
the bigger picture with it as to all places that originate these two 
signals, what devices can assert them, and most importantly, how those two 
signals are routed exactly from power supply to the cpu, to the expansion 
box (which has it's own ACLO/DCLO), all the way to the final M9312. Then not 
only could I take the measurement, but better understand what I'm seeing.

Any education is most appreciated!

Jay West

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