Unknows S-100 System
Allison
ajp166 at bellatlantic.net
Sun Sep 23 16:50:40 CDT 2007
>
>Subject: Re: Unknows S-100 System
> From: "Roy J. Tellason" <rtellason at verizon.net>
> Date: Sun, 23 Sep 2007 12:35:38 -0400
> To: "General Discussion: On-Topic and Off-Topic Posts" <cctalk at classiccmp.org>
snippage>>>>>>>>>
>> What irritated me was that Intel never documented the additional 8085
>> instructions, even though they seemed to be present on every version
>> of the chip Intel (and second sources) ever produced. Because they
>> weren't "officially" documented, we adopted a policy that they should
>> not be used to avoid possible future "surprises".
>
>What are these? I remember some stuff in the magazines early on (probably
>Byte, in its first year of publication or so) and have run across some stuff
>on the 'net about undocumented z80 opcodes, most of which don't seem to be
>terribly useful, but this is the first I've heard of undocumented 8085
>codes.
from my compendium of acient history and useful junk:
Hex 8085 Meaning
---------------------
08 SUB HL-BC
10 RRHL ;Rotate HL right. 16-bit rotation, flags unchanged.
10 Shift right HL
18 RLDE Rotate DE left. Bit 15 to Carry. No other flags.
18 Rotate right DE
28bb ADI HL,bb ;Add 00bb immediate to HL, setting flags.
28 Add HL and Immidiate nnnn into DE
38bb ADI SP,bb ;As above but to Stack Pointer.
38 Add SP and Immidiate nnnn into DE
CB RSTV8 ;RST 8 (to 0040) if the V flag is set.
CB ReSTart on Overflow(V) to 0040h
D9 SHLDE ;LD (DE),HL
D9 Load [DE] from HL
DDaaaa JNK aaaa ;Jump to location aaaa if K flag is reset.
DD Jump on 'Not X5'
ED LHLDE ;LD HL,(DE)
ED Load Hl from [DE]
FDaaaa JK aaaa ;Jump to location aaaa if K flag is set.
FD Jump on 'X5'
bit 8085
7(MSB) S sign
6 Z Zero
5 X5
4 AC aux carry
3 0
2 P parity
1 V overflow
0(LSB) C carry
Intel did not further specify the undocumented 8085 instructions.
This however means that other assemblers might use different mnemonics for the same function.
DSUB 08 10cy HL <- HL - BC
Instruction : DSUB [reg] (DSB BC)
Function : HL HL - reg (double subtract)
Flags : CY, S, X5, AC, Z, V, P
Arguments : reg = B for BC (optional)
ARHL 10 7cy HL <- HL/2, CY <- L0
Instruction : ARHL (SHRL)
Function : HL,CY HL >> 1 (arithmetc right shift)
Flags : CY
Argument : none
RDEL 18 10cy DE <- DE*2, E0 <- CY, CY <- D7
Instruction : RDEL (SLDE)
Function : CY,DE DE << 1 (arithmetic right shift)
Flags : CY, V
Arguments : none
LDHI imm 28 dd 10cy DE <- HL + imm
Instruction : LDHI d8 (LRI HL,D8)
Function : DE HL + d8 (HL + 8bit >DE)
Flags : none
Arguments : d8 = 8-bit constant
LDSI imm 38 dd 10cy DE <- SP + imm
Instruction : LDSI d8 (LRI SP,D8)
Function : DE SP + d8 (SP+ D8 >DE
Flags : none
Arguments : d8 = 8-bit constant
RSTV CB 6/12cy if(V) push PC, PC <- 40H
Instruction : RST flag (RSTV)
Function : restart to 40h if flag=1
Flags : none
Arguments : flag = V
SHLX D9 10cy (DE) <- HL
Instruction : SHLX DE
Function : DE < [HL]
Flags : none
Arguments : reg = DE
LHLX ED 10cy HL <- (DE)
Instruction : LHLX DE
Function : [DE] > HL
Flags : none
Arguments : reg = DE
JNX5 addr DD al ah 7/10cy if(!X5) PC <- addr
Instruction : JNX5 addr
Function : jump to addr if X5=0
Flags : none
Arguments : addr = absolute 16-bit address
JX5 addr FD al ah 7/10cy if(X5) PC <- addr
Instruction : JX5 addr
Function : jump to addr if X5=1
Flags : none
Arguments : addr = absolute 16-bit address
X5 is the otherwise unused bit 5 in the PSW register
Allison
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