IBM 5150 maximum memory?
Jim Battle
frustum at pacbell.net
Fri Apr 25 17:43:02 CDT 2008
Jim Leonard wrote:
> Tony Duell wrote:
>> [1] When I got my first IBM PC-family machine (a 5160), I took it to
>> bits (what a suprise) and sat down with the TechRef. Every few minutes
>> I'd exclaim 'They did WHAT???' as I found aother it of misdesign...
>
> That's not the first time you've mentioned that, so now I have to ask
> you: What's the #1 most glaring misdesign you can remember about the
> 5150 or 5160?
I never studied the 5150 schematics, although I once designed an ISA
plug in card containing a 68020, DRAM, and three ASICs. We had no ISA
specs to design off of, so I just looked at the bus interface part of te
PC design.
Two things come to mind, one of which was recently mentioned. The
interrupt structure was poor -- using edge triggered interrupts prevents
sharing an interrupt line. As recall the choice of edge or level
sensitive interrupts is a matter of software (programming a control
register in the interrupt controller chip). There was no cost
associated with doing it one way or the other. Someone just decided
incorrectly, and once the convention was set, it couldn't be undone.
Another silly thing is that refresh was controlled by a DMA channel.
I'm sure it saved a couple chips, but it meant that errant, or
malicious, software could turn off the refresh and cause the memory
state to melt. A friend wrote a program that turned off that DMA
channel on purpose, but made sure his program would touch every row in
the DRAM frequently enough that his program would keep running.
However, if anyone tried to halt the program to capture the memory image
so they could reverse engineer his game, they'd get corrupted memory.
More information about the cctalk
mailing list