cclist at sydex.com
Fri Dec 12 14:29:26 CST 2008
On 12 Dec 2008 at 10:47, bfranchuk at jetnet.ab.ca wrote:
> Most of the FPGA designs I have seen are RISC's or some 6502 offshoot.
> I am sticking for now to CPLD's, since you don't have to configure the chip
> like a FPGA, Also a little cheaper if you stick to a bare design like a
> Two CPLD's for the data path and 1 CPLD for control.
How about a 20-bit word size, 4 bit opcode, 65KW addressing space,
simple one-address+accumulator machine? Enough directly-addressable
memory to do just about whatever you need to do, simple to implement.
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