vintage CPU instruction sets

Rich Alderson RichA at vulcan.com
Mon Dec 15 16:26:06 CST 2008


From: Andy Holt
Sent: Friday, December 12, 2008 2:15 AM

 [snip ]

> [Computer Structures: Readings & Examples, by  Gordon Bell]

> As personal thoughts on the subject and going backwards in time I'd think of
> looking-at and comparing the following.

> The two pre-micro classics, nay extremes, of CISC:

> *IBM system 360/370/...  [Multi-GP-register - store organisation with a
>  sprinkling of store-store operarions]
> *DEC VAX (and its simpler predecessor, the PDP-11) [address-modes-R-us]

> The RISC before there ws RISC:

> *CDC6600

The PDP-10 is often described this way.

> The classic 36-bit architectures

> *IBM709/7090/7094 [single accumulator/few index registers]
> *GE6xx/Multics/Honeywell L66 [similar architecture, taken to its limits, and
> (in later models) even more address modes than a VAX]

...and I'm surprised that you don't consider the PDP-10 to be a classic 36-bit
architecture.  Or the SDS Sigma series, for that matter.

 [snip]


Rich Alderson
Server Engineer, PDPplanet Project
Vulcan, Inc.
505 5th Avenue S, Suite 900
Seattle, WA 98104

mailto:RichA at vulcan.com
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