Minimal CP-M SBC design
ethan.dicks at usap.gov
Sun May 4 20:25:47 CDT 2008
On Sun, May 04, 2008 at 09:03:03PM -0400, Andrew Lynch wrote:
> Hi Ethan, I reread your email and thought I'd try to answer some of your
> questions regarding a simple do it yourself CP/M computer.
> My first piece of advice is to ask Allison ;-) since she has done this
> dozens of times and can boot CP/M blind folded on a spark gap radio.
Sure. I was hoping she would chime in. My experience over the years
with CP/M has been somewhat tangental (I've worked on Kapros at work
back in 1980s, I own a couple of Kaypros still, and I've done a little
bit with 22disk and such under MS-DOS), but everytime Allison posts
on CP/M, I learn something.
> Your basic hardware certainly sounds CP/M capable. I assume that it can
> swap RAM in to the lower pages though, right? CP/M requires RAM at $0000
> through some address (depends).
Right. As it stands, the hardware probable cannot do that, but the ace
up my sleeve is that there is a 16V8 GAL that is already wired to important
bus signals so that it can act as the chip select circuit. I was
planning on using one of the output flops as the bootstrap-ROM-enable.
I've done similar sorts of things with MC68000 designs in the past.
> It likes RAM all the way to $FFFF but can
> live with ROM in the $F000 range. Less RAM than 48K makes things difficult
> though, IMO.
That's what I was unsure about - but RAM to $EFFF and ROM from $F000 on
up is easy to implement.
> How I implemented my machine was to use a memory configuration latch
> (74LS273)... The schematics are all on my N8VEM page.
I'll check those out when the sats rise here.
> A pair of 62256's would work but I prefer a solution using a 512Kx8 SRAM.
> That lets you use the 64K for RAM and the rest for a RAM drive. Whatever
> does it for you though.
I happen to have some 62256s with me, not any 512Kx8 SRAMs, and the next
plane isn't for almost 6 months.
> Writing the CBIOS is actually not that hard. I wrote one more or less based
> on the one in the Andy Laird's CP/M programmers guide book. It was
> recommended by Allison and is *the* reference book AFAIK. CP/M is a great
> OS and is rather portable considering everything it does.
Hmm... is there a soft copy of that book anywhere? It sounds like the
perfect reading companion.
> I use 16550 UARTs but the CBIOS abstracts all those details away. I think
> CP/M could care less what sort of serial port you use, even if you use one
> at all. Just implement the CBIOS IO routines and it'll work. Same thing
> for drives; you can use floppy drives, memory, IDE, hard disks, whatever
> from CP/M's perspective they are all block devices.
Right... but what I _have_ is a choice between a 16550 and a 6402. One
advantage of the 6402 is that its options are hardware selected, so the
bootstrap code doesn't have to do much to be able to squirt out a message
that it's alive. It's probably impractical to put a video circuit on this
design, so I'm going with a serial console in the CBIOS I/O routines
and shifting the burden of display and keyboard input to a dedicated
> Best of luck with your project. Let me know if there is anything I can do
> to help!
Thanks. I still have lots of reading to do, as well as a bit of work to
fiddle up some GAL equations to implement the memory map. It's going to
be somewhat trivial to roll out a 32K RAM/8K ROM design, since there's
already a pair of 28-pin sockets wired up for SRAM and EPROM. The first
big trick will be mounting a second SRAM chip. I do wish I had a 512Kx8
SRAM with me, but alas, no.
I think I have all the parts needed for a ROM emulator, but if not, I
do have a battery-backed 8K SRAM (48Z08?) that I can program in a device
programmer and treat as a ROM for firmware development. At home, I have
a Grammar Engine PromICE, but I didn't happen to haul that along.
Thanks for the pointers. I'll check out your project when the 'net
comes up for us.
Ethan Dicks, A-333-S Current South Pole Weather at 5-May-2008 at 01:10 Z
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Ethan.Dicks at usap.gov http://penguincentral.com/penguincentral.html
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