Minimal CP/M SBC design?

[dwight elvey]

> From: rtellason at verizon.net
>>
> On Sunday 04 May 2008 23:54, dwight elvey wrote:
>>> From: ethan.dicks at usap.gov
>>>
>>> I am a little unclear, though, about how traditional CP/M systems
>>> were set up for ROM and RAM. Was it common to use a "shadow ROM"
>>> in low mem at reset, then have the BIOS live at the top of memory?
>>
>> Hi
>> Most ROM based machines do some kind of shadow method to boot,
>> unless one has a front panel to select the boot address.
>> Other than that, there is no particular reason to shadow the high
>> memory ROM.
>> My CP/M system is completely RAM. The disk is DMA and has
>> a built in boot strap boot from disk. No ROM at all in my machine.
>> Dwight
>
> How does that bootstrap work, then, with no ROM?
>

Hi
 There is ROM in the DMA controller ( not part of system Memory ).
It runs a state machine that causes the first sector of the disk
to be loaded at address 0 on a reset signal.
 I have code on that first sector that loads the image of CP/M into
high memory.
 To boot all I do is reset, wait for the disk to stop and then run.
There is no system ROM used, just the state machine that
is the disk DMA controller.
 If you curious about this controller see:
http://retrotechnology.net/dri/torode_designs.html
Dwight

_________________________________________________________________
Windows Live SkyDrive lets you share files with faraway friends.
http://www.windowslive.com/skydrive/overview.html?ocid=TXT_TAGLM_WL_Refresh_skydrive_052008