Minimal CP-M SBC design

Allison ajp166 at bellatlantic.net
Sun May 11 06:19:24 CDT 2008


>
>Subject: Re: Minimal CP-M SBC design
>   From: "Chuck Guzis" <cclist at sydex.com>
>   Date: Sat, 10 May 2008 11:27:50 -0700
>     To: cctalk at classiccmp.org
>
>> Date: Sat, 10 May 2008 12:29:24 -0400
>> From: Dave McGuire 
>
>>    I dunno Chuck...the only reason more CP/M systems weren't ROM- 
>> resident back in the day was due to convention, not technical  
>> restrictions.  I (personally) don't think there's anything  
>> non-"period" about ROM-ing CP/M.
>
>It's not the ROM-ing of CP/M that disturbs me, but rather the 
>"disklessness" of the thing.  Wasn't the whole idea of CP/M 
>originally to give you something to manage files on your floppy 
>drives?  I mean, that's what the bulk of the code in CP/M is for--
>heaven knows, the support for other I/O is nothing to write home 
>about. 

It would not be diskless only floppy less.

>
>If one wants to enjoy a "vintage" experience, what sense is there in 
>being diskless?  At any rate, even something as simple as a WD1770-
>type controller added to the design would give that capability with a 
>minimum of support "glue".  

IF you really want to enjoy the vintage experience you can include a 
floppy controller but be warned...They are a PAIN to use and program.
The most important detail is the unless you include DMA (more parts)
the cpu does all the heavy lifiting in real time and that requires
tight code or some hardware tricks (more parts).  It stops getting 
simple real fast. Then there are the various floppies with their 
interface quirks.

IDE and CF have simple interfaces, they do not have to be written 
or read in real time, they are obtailable.

FYI reading and writing in real time for a 5.25" DD floppy (seriously
anything less than 360K is useless) requires the CPU to fetch/put 
a byte  every 16uS without delay and in somecase the worst case 
timing for that is 14us.  Write a simple routine in Z80 at 4mhz
that does that, reliabily.  Forget using 1.44MB floppies as doing 
that in under 8uS is out of the question without a 8mhz Z80, fast 
ram to support it, fast Eprom and all the other nice things that 
go with faster.  FYI: at 4ux a CPU cycle is .25uS and the shortest
instruction is nop at 4 cycles (no wait states) or 1us and a DJNZ
is around 7/10 cycles or 1.75uS to 2.5uS... the timing picture
is tight.


Also there is the problem of getting some FDCs like the 1770,2793
and other more highly integrated chips that aren't 44 pin QFP.

>Alternatively, one could stay diskless and add a sound-effects module 
>to emulate the "chunk" and "grrr" of a head-load and seek--and the 
>"thunk-click" of a drive door being opened and a floppy inserted.  

How many more parts do you think you need for that?  

>I still don't have the hang of this "vintage" thing yet, probably 
>because I'm vintage myself.  Please forgive my density...

;)  having built my first Altair in january 1975 and prior to that
for work an 8008 when it was new.. what me vintage?


Allison


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