Interfacing a 68000 to RAM

[Ethan Dicks]

On Mon, Jun 1, 2009 at 1:50 PM, Jeff Walther <trag at io.com> wrote:
> If you're trying to interface with SRAM that typically just takes a
> straight address and does not require refresh, so it's much easier.

It's especially easy if all of your memory and peripheral I/O chips
are fast enough that you don't have to use DTACK to generate wait
states... google for "DTACK Grounded" to find a stack of hardware
design newsletters that advocate that simple technique.

The 68000 design for the COMBOARD is not so simple, so we had a PAL to
generate DTACK based on what subsystem was being accessed (1/4th of
the 68000 memory map was a DMA interface to the Unibus/Qbus host
backplane, so we had to wait for a host DMA cycle before we could
assert DTACK for those addresses).  A self-contained 68000 design
should never have anything that complex to worry about, and now,
peripheral chips and SRAMs are plenty speedy, even on a 68000 clocked
8MHz or faster.

-ethan