slightly OT: NMOS gate identification

Steven Hirsch snhirsch at gmail.com
Mon May 4 16:14:01 CDT 2009


On Mon, 4 May 2009, Keith wrote:

> I'm attempting a painful task of extracting logic from an image of a NMOS die 
> manufactured in 1984.  Initially, I'm only going after a small portion of 
> logic from the chip.  I have a block diagram which appears to roughly match 
> the chip layout, a pinout, and an overall description of the logic.

How many metal levels?  If you can reduce it to shapes on levels, an LVS 
tool is theoretically capable of deriving the netlist.  Will still be a 
lot of work and good tools don't come cheap.



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