Disc analyser news update
brad at heeltoe.com
Thu Mar 18 17:33:53 CDT 2010
Tony Duell wrote:
>> But most JTAG debuggers allow for breakpoints/watches, register
>> examination/alteration, single-step, etc. And there's at least one
>> debug interface that uses a one-wire connection to the RESET pin, so
>> you get to use all of the I/Os.
> But there are several problems with that approach. The main one is that a
> breakpoint is intrusive, it changes the behaviour of the system.
Sorry to barge in, but I don't think is exactly correct. On most ARM
systems these days, for
example, there are multiple hardware breakpoints inside the jtag debug
logic which are
not intrusive. They don't perterb the instruction stream at all until
they are hit.
And, on some ARM SOC's there is an internal trace buffer which is also
and is "free" in terms of timing (i.e. it doesn't slow anything down).
Both have saved me a few times.
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