Would a bog-standard 4164 be a suitable replacement for a MCM4517
ard at p850ug1.demon.co.uk
Thu Oct 21 15:02:03 CDT 2010
> On 10/20/2010 02:15 PM, Ethan Dicks wrote:
> > Could you use a 4164 instead? (it might require a pull-up or
> > pull-down on pin 9 so it doesn't float).
> I'd just hardwire pin 9 to either +5V or ground. Probably easiest to
> tie it to +5V on pin 8.
I've replaced 4116s (3-rail) with 4164s in an 'emergency'. Bend out pins
1 and 8 (-5V and +12V on the 4116, N/C nad +5V on the 4164) and jumpr pin
8 to pin 9 (+5V on the 4116, A7 on the 4164) on the chip. Then plug it
in. This, of couse ties A7 high since it's going into the 5V pin of the
> 16K DRAMs all required 128 row refresh in 2 ms.
> 64K DRAMs came in two kinds. Some required 256 row refresh in 4 ms,
> while others (specifically intended for compatibility with 16K DRAMs)
> required only 128 row refresh in 2 ms. The latter kind will work with a
> 7-bit refresh counter (e.g., 3242, or the counter built into the Z-80),
> while the former will not.
> However, in this case, you're only going to use 128 rows (and only half
> of each row), so either kind of 64K DRAM should be suitable.
I asusme in all cases, the row that's seleected by a particular address
is also the row that's refreshed by that address, so the rows that get no
refesh are the ones that are never used in this arrangement. I can think
of no sane reason to desing a DRAM any other way, but...
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