DiscFerret: First working hardware, firmware and microcode!

Philip Pemberton classiccmp at philpem.me.uk
Mon Oct 25 17:39:05 CDT 2010

On Mon, 2010-10-25 at 16:06 -0500, Jules Richardson wrote:
> Do you have some rough idea of costs? Or is that totally unknown until you 
> have an idea of interest?

The smallest batch I can make up is three units, which costs as about
£95 per unit at "standard spec", without a power supply or case. With a
smaller FPGA, this can be knocked down to about £90 per unit.

Note that the type of FPGA doesn't matter: the smaller part can be
specified as a Migration Device in Quartus, meaning the RBF file
(microcode) will work on both parts. The microcode currently uses about
1800 LEs, out of the 5000 available on the smallest part, and the 8000
on the larger part. I only used the 8000 LE part because I had some
lying around.

> (is "PCB along with any programmable parts supplied pre-programmed" a useful 
> option? Or do the boards contain enough smarts that you can easily 
> program/reprogram an assembled board using a plain ol' PC?)

Argh -- I forgot about that. You need to program the PIC with a
bootloader, then the board can take a firmware download over USB. You do
this with the In-Circuit Serial Programming port (the same port the
MPLAB Debuggers use to talk to the chip).

I'll probably get a batch of PICs made up with the bootloader
pre-loaded. A batch of 25 pre-programmed chips from MicrochipDirect
works out at about the same per-part as 25 blank chips from Farnell.
Adding a thermal-transfer label to the part only adds another 7p to the
per-chip cost... Hardly worth arguing about, really, and it saves
faffing around with a chip programmer.

I should note that there's a set of ICSP pads on the bottom-side of the
PCB. You can solder wire-wrap wire to these, then hook them up to an
ICD2, ICD3, PICKit2 or PICKit3 to debug the MCU firmware. There's a
similar feature for the FPGA -- a four-pin JTAG header and a pair of
power test points. This means you can wire the FPGA to an Altera
ByteBlaster2 or USB Blaster, run SignalTap and spy on the FPGA logic.
This has helped to resolve quite a few microcode bugs!

classiccmp at philpem.me.uk

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