hardware multiply/divide functionality in CPUs

allison ajp166 at verizon.net
Mon Mar 7 16:40:03 CST 2011


You forgot one.

Northstar* S100 system had an optional FPB it did BCD math (ADD, SUB,
MUL, DIV) for two operand of 2 to 14 BCD digits.  It was much faster than
could be done with software in the Z80.

EAE was PDP-8

The PDP11 series had multiple implementations including the FPP (2901 based)
and the FIS for the 11/23cpu (F11).  The 11/44 had a FPU that used a carload
of 2901s.

There were many other I'm sure I'm passing over.

Allison

On 03/07/2011 05:20 PM, Tony Duell wrote:
>>
>> ... or mid-late '70s and early '80s CPUs, to be more specific. Can anyone
>> furnish me with a better knowledge as to which processors of that kind of time
>> period had hardware multiplication and division support?
>>
>> http://en.wikipedia.org/wiki/Binary_multiplier mentions the 6809, but I'm
>> curious as to which* others had such hardware features (and when they started
>> moving from simple shift-add routines to more complex approaches which used
>> more silicon - or did that not happen until much later in the 80s?)
>>
>> * mainframe, mini, micro; I'm not picky. I'm more interested in building up a
>> picture of how widespread hardware support was, and the various approaches
>> that designers used.
> What do you mean by 'hardware' multiply and divide? A number of machines,
> I suspect the 6809 is amongst them, had no particualrl hardware for
> multiply or divide, but they did have multiply and maybe divide
> instrucitons in the instruction setc. These instrucitons were implemented
> by microcode using the normal registers and ALU. Does that count?
>
> IIRC, the PDP11 got hardware multiply and divide with the 11/45 in 1972.
> It was simple shift+add IIRC. The floating point boards for that machine
> implemented multiply and divide suing a few speedup tricks (like
> subtracinging, skipping paset a block of 1s in the multiply and then
> edding, so that, for example, *15 became a *-1 + *16 if you see what I mean).
>
> And IIRC, there wa sno multiply-specific hardare (or at least not much)
> on the 11/45 CPU. Itwas mostly done in microcode.
>
> Not all PDP11s had said instrucitons after that, though.
>
> The EAE Extended Artihmetic Element) for the PDP11 (a Unibus card that
> would wotk in any Unibus machine) and a similar add-on for the PDP8/e CPU
> were essnetially hardware multiply/divide boards. The Unibus one didn't
> add to the processor instruction set, rather it had its own registers
> (accessed like I./O ports) that you loaded the numbers into and read the
> rsult from.
>
> The PERQ1 (4K WCS) -- 1979-- had no multiply/divide supprot, the PERQ1a --
> 9180 -- (and thus all later classic PERQs) had the MulStep/DivStep
> hardware which let you calcu;ate one bit of the product or quotient in one
> microcycle (using restoring division).  However the stnadard microcode
> for all classic PERQs (loaded from disk at boot-up) had multiply and
> divide _machine_ code instructions.
>
> -tony
>




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