hardware multiply/divide functionality in CPUs
Brent Hilpert
hilpert at cs.ubc.ca
Mon Mar 7 19:26:04 CST 2011
On 2011 Mar 7, at 4:08 PM, Jules Richardson wrote:
> Richard wrote:
>> I don't think the multiply implementation in the IBM 701 was shift/add
>> microcode variety. That wouldn't have been very performant for its
>> intended purpose (scientific computing).
>
> I'll have to have a look online and see if I can find any details. I
> see that Booth's algorithm was 1951 - much earlier than I expected and
> a year before the 701. I'm not sure when Wallace trees showed up...
I know you mentioned 70s/80s in your initial message, but if you are
considering early stuff:
- The ENIAC did hardware multiple/divide/square root. Multiply was done
using a partial-products scheme.
- Some IBM card/unit-record/accounting machines did electronic
multiply/divide in the 1940s/50s. I sometimes see mention of an IBM
researcher developing an electronic multiplier in the late-30s or very
early-40s but I don't have a ref.
- The Draft Report on the EDVAC (1945) described or included hardware
multiply and divide. I don't know whether it was implemented on the
EDVAC or not.
- Whirlwind had hardware multiply (not sure about divide), late-40s.
I wonder if multiply/divide were the incentive for Wilkes' development
of microcode, as most other instructions of the time would not be very
complex.
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