PDP-12 at the RICM

Fred Cisin cisin at xenosoft.com
Tue Jul 14 23:53:38 CDT 2015

>>>  The 8086 had four segment registers:
>>>     CS    - Code segment, used with IP register
>>>     DS    - Data segment
>>>     SS    - Stack segment, used with SP and BP registers
>>>     ES    - Extra segment, used with DI for string instructions as
>>>           destination (DS:SI as source)
>>>  You could override instructions dealing with memory with any of the
>>> segment registers:
>> If you were writing an emulator, what would you have it do if an interrupt 
>> occurred while in a REP operation with a segment override?
>> Just how accurately should an emulator match the behavior of the emulated 
>> processor?

On Tue, 14 Jul 2015, Guy Sotomayor wrote:
> It's actually described in the Intel SDM (Software Developer's Manual).  ;-)
> The start of the instruction is actually the segment override (one of 
> the things that makes decoding x86 instructions hard).  Since the REP 
> XXX instructions are interruptible, the IP does not move to the next 
> instruction until after it completes (and the state of the REP XXX 
> instruction is kept in various registers that are updated on each 
> iteration).
> So, when an interrupt occurs, the execution is stopped (after the current
> iteration completes) and is restarted when the interrupt returns.

That certainly sounds reasonable, but,
have you noticed the difference in behavior of 8086/8088 V 80386?

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