PDP-1 in Verilog (Incomplete) + More

Kip Koon computerdoc at sc.rr.com
Thu Jul 30 21:06:02 CDT 2015

Hi Jay, 
I don't know if you are into Motorola microcontrollers or not, but I'm looking for an IP core for the MC68HC11K Microcontroller as I can't find the actual chip on ebay.  Would you be interested in implementing this microcontroller in VHDL?  I'm trying to learn VHDL, but my many projects keep wanting my time.  :)  I believe there is plenty of reference material for you to use.  I've collected some documentation myself that I would be happy to share if need be.  Please let me know what you think.  Take care my friend.

Kip Koon
computerdoc at sc.rr.com

> -----Original Message-----
> From: cctalk [mailto:cctalk-bounces at classiccmp.org] On Behalf Of Jan Adelsbach
> Sent: Thursday, July 30, 2015 3:32 PM
> To: General Discussion: On-Topic and Off-Topic Posts
> Subject: PDP-1 in Verilog (Incomplete) + More
> Hi all,
> At the time I've released my DG NOVA in Verilog I was also working on a
> PDP-1 in Verilog. Since I haven't
> touched the thing for quite some time I've decided to just release it before it catches dust. So far it can execute all kinds of programs,
> limitation is that they may not use IO as I haven't implemented the latter yet. (So essentially the same state as my DG NOVA
> implementation) It also supports optionally some PDP-1D features in the OPR and SKP instruction groups. Interrupts are implemented
> but untested. I'm not sure in which state I left the IOT controller if it works then both SBS and SBS16 might be usable.
> TL;DR: https://github.com/Jside/pdp1
> The RCA110 was the project I was working on before I started the DG NOVA, it can execute some instructions but there is to much
> ambiguity in the reference manual on bitsavers in some cases which led me to abandon it. Especially since there is no software to
> cross-check.
> So for reference you can get it here:
> https://github.com/Jside/rca110
> I wanted to mess around a bit with Chisel (a new HDL language used by the RISCV project) so here is the start of a CDC160 (currently
> only the instruction decoder):
> https://github.com/Jside/cdc160
> I've also uploaded my DG NOVA to Github: https://github.com/Jside/nova1
> MC14500B anyone? http://janadelsbach.com/soft/mc14500b.tar
> I will occasionally continue working on both the NOVA and PDP-1 (and maybe CDC160?). Also pull requests are welcome.
> As is obvious I *really* like implementing old computers in HDL languages but I always get stuck around IO since for any kind of
> flexibility as with an emulator I essentially would need to write a bus wrapper so that a (soft-core) processor executing Linux running
> an IO server could handle i.e. hard disks and magnetic tapes and that's I think really not worth it. So I might just go over and contribute
> to an emulator/simulator like SIMH if I'm in an must-implement-an-old-computer/processor mood ;).
> Regards,
> Jan

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