Odd "endianness" [was Re: RE: Base 64 posts to the list]

Rich Alderson RichA at livingcomputers.org
Fri Dec 9 13:47:27 CST 2016

From: Phil Budne
Sent: Friday, December 09, 2016 10:44 AM

> Rich Alderson wrote:

>> There are also Two-Word Global Byte Pointers (which I've never seen
>> abbreviated) which carry the standard "any size byte at any position"

> Maybe they were just Global Byte Pointers?  OWG's were a late
> addition.  I was a member of the FORTRAN-10/20 v10 project to make it
> generate/run code in extended addressing...  It's tempting to look at
> the compiler and FOROTS to see what terms we used a the time...

Both One-Word and Two-Word Global Byte Pointers were added at the same
time as extended addressing, according to the HRM.  Simple "Global Byte
Pointer" would have been inherently ambiguous.

OWGBPs were a way not to increase the memory footprint of a program when
moving it into a non-zero section,[1] at the expense of some microcode.
In theory, a binary could be patched for use in a non-zero section without
a recompile, as long as it was using 6-, 7-, 8-, 9-, or 18-bit bytes.

>> Neither of those is entirely accurate.  9-track tapes on the PDP-10 used
>> one of the following encodings:

> 8-bit characters became more important near the end of PDP-10 software
> development.  ISTR TOPS-10 getting new 8-bit I/O modes, but I have a
> vague recollection that translation between 36-bit words and mag tape
> frames was handled by the "tape formatter" hardware, which means that
> writing two words with 8 bit bytes in way that was easily legible on
> 8-bit byte oriented hardware ("high density mode" was only "legible"
> for the even words).

Yes, all the translations are handled in the formatter, which is part of
the tape controller.  To continue the example, in Industry-Compatible
format, where the ASCII characters have been moved into 8-bit bytes in
36-bt words, on 9-track tape we have "HELLOworld" as


In memory, this takes 3 words:



[1] For non-PDP10 programmers:  The original architecture of the PDP-6 and
    PDP-10 used an 18-bit (256KW) address space.  The KI-10 processor added
    a 22-bit pager and a concept of sections to the hardware.  When the
    address space was expanded to 30 bits (1MW) on the KL-10 processor (in
    anticipation of the KC-10 a/k/a "Jupiter"), it was done by retaining
    18-bit local addressing and adding a 12-bit section number to provide
    global addresses.  Section 0 is special, working like the older 256KW
    memory space; non-zero sections can reference all of memory, with an
    18-bit address in a non-zero section being section local and a 30-bit
    address referencing anything except section 0.

Rich Alderson
Vintage Computing Sr. Systems Engineer
Living Computer Museum
2245 1st Avenue S
Seattle, WA 98134

mailto:RichA at LivingComputerMuseum.org


More information about the cctalk mailing list