IBM 360/30 in verilog
dave.g4ugm at gmail.com
Tue Jul 12 03:14:20 CDT 2016
> -----Original Message-----
> From: cctalk [mailto:cctalk-bounces at classiccmp.org] On Behalf Of Curious
> Sent: 12 July 2016 08:58
> To: General Discussion: On-Topic and Off-Topic Posts
> <cctalk at classiccmp.org>
> Subject: Re: IBM 360/30 in verilog
> Darn. My hopes are shattered. Lots of Verilog in my future, that is if we
> find 360/50 ALDs...
It actually might be easier to produce a generic S/360 clone in FPGA using
the POP rather than individual ALU's.
Having built a very simple CPU (in VHDL not Verilog) and planning to start
on a more complex (Ferranti Pegasus)
Of course it wouldn't be cycle accurate, but perhaps that wouldn't be
> > On Jul 12, 2016, at 11:31 AM, Jon Elson <elson at pico-systems.com> wrote:
> >> On 07/11/2016 07:35 PM, Curious Marc wrote:
> >> Thanks for the detailed answer. I see the front panels look remarkably
> similar though. Short of redoing a 360/50 on an FPGA (I'd need to retire
> have enough time for this one!), could I use the /50 panel with the /65
> > Not really! The 360/50 had 4 "rollers" for 4 rows of lights, and one
> data switches, and 2 rows of dedicated lights.
> > The 360/65 had 6 rollers with 6 rows of lights, plus TWO rows of data
> switches, and pretty much no dedicated lights other than associated with
> > Both had a row of address switches under the data switches.
> > So, yes, in GENERAL, they had a similar look and layout, but in detail,
> was a lot different, some of it specifically related to the memory word
> > The only machine that looked really different was the 360/30, that had a
> panel more reminiscent of the 1401.
> > And, of course, the 360/85, which was really a prototype of the 370/165.
> As far as software was concerned, it was just a really fast 360, but the
> hardware was MUCH more advanced.
> > Jon
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