How do they make Verilog code for unknown ICs?

Paul Koning paulkoning at
Mon Jun 20 15:19:56 CDT 2016

> On Jun 20, 2016, at 4:17 PM, Paul Koning <paulkoning at> wrote:
>> On Jun 20, 2016, at 3:35 PM, Swift Griggs <swiftgriggs at> wrote:
>> In my recent studies of electronics (I'm a noob for all practical 
>> purposes) I keep seeing folks refer to Verilog almost as a verb. I read 
>> about it in Wikipedia and it sounds pretty interesting. It's basically 
>> described as a coding scheme for electronics, similar to programming but 
>> with extras like signal strength and propagation included. Hey, cool! 
> Verilog and VHDL are two "hardware description languages".  You can think of them as programming languages to describe hardware behavior.  Another way to look at them is as languages designed to let you talk easily about lots of things that happen at the same time -- which is what happens in hardware.

I forgot to mention: at least for VHDL, there's an open source simulator.  In other words, a program that accepts VHDL input and lets you "run" the simulated hardware.  You can feed it inputs in various ways, and observe its behavior -- for example as waveform traces on a waveform display, like an oscilloscope.  Look for GHDL.  It's a GCC front end; it takes your VHDL code and compiles it, then it's linked with a support library to make an executable program.  Since it's GCC based you can do neat things, like run it on various hardware platforms.  Or link in C functions to do stuff, like simulate external peripherals connected to your hardware model.

I haven't looked for open source Verilog simulators.


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