options for replacing failed small ROMs in PDP-11

Josh Dersch derschjo at gmail.com
Fri Jun 24 21:42:34 CDT 2016


On Fri, Jun 24, 2016 at 7:41 PM, Fritz Mueller <fritzm at fritzm.org> wrote:

> Thanks for the info, Don -- learning a lot about this stuff as I go...
>
> I had wondered if the part might have been a mask ROM rather than a PROM.
> And wrt. timing, I was certainly mistaken to call the nominal interval
> between the clock pulses a microcycle.
>
> So after staring at the flows and prints a little more closely, it looks
> to me now like the IR will be latched at FET.10 t6 (which is really IRD.00
> t1?) then there is the rest of intervening IRD.00 during which time control
> signals can propagate to and through decode logic and the subsidiary ROM
> and ALU, then the ALU results are latched into the shifter at EXC.80 t2 or
> EXC.90 t2.  So that's a solid 150ns there minimally?
>
> From the prints, it looks like this is an open-collector part -- I don't
> see it called out, but the chip select is wired active and I can't see that
> the outputs have any other drivers.
>
> So that's good news for repairing my board!  Which brings on the next
> question: do folks here have a recommendation for a good programmer to try
> and track down on eBay for programming these sorts of parts?
>

A Data-I/O 29A or 29B will do the job nicely.

- Josh



>
>     cheers,
>         --FritzM.
>
>
>
> On 06/24/2016 06:28 PM, Don North wrote:
>
>> Almost 100% certainty the part already there is a small bipolar TTL PROM.
>> What would you think it otherwise might be?
>>
>> For a lot of these logic replacement applications DEC used the open
>> collector version, but it might be tristate variation. Check schematic.
>>
>> Also, the microcycle on the 11/45 (and 11/70 for that matter, basically
>> the same design) is 150ns, not 30ns.
>>
>> There are various clock timing pulses (tp1, tp2, etc) but the datapath /
>> control unit microcycle is 150ns.
>>
>
>


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