DEC bus transceivers (was Re: Unibus disk controller with modern storage)
jnc at mercury.lcs.mit.edu
Mon Oct 24 08:34:33 CDT 2016
> From: David Bridgham
> Just the bus interface takes over half the area of a dual-height board!
In part because the level converters are SMD, and we had to mount them on
(modified) wide DIP carriers to use them in a wire-wrap board.
> I've played around with laying out what might be the production board
> ... and I've got it down to a row of 8641 bus transceivers and a row or
> two of the level-converter chips.
For those looking at that picture, it's not our current plan for 'producton'
QSIC's; the one in the picture uses a daughter-card with an FPGA on it, but
that makes the card to high to fit into a single slot. So the current plan is
to do a card with an FPGA on it directly.
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