DEC bus transceivers

Paul Koning paulkoning at
Mon Oct 24 15:30:11 CDT 2016

> On Oct 24, 2016, at 3:55 PM, David Bridgham <dab at> wrote:
> On 10/24/2016 12:01 PM, Paul Koning wrote:
>> I don't know about the receiver part, but I'd expect that the drivers could very easily be done with a simple transistor circuit.
> Agreed.  However ...
>> As for slew rates, unless you have antique transistors, that's not going to be an issue given that you meet the current sink spec; the slew rate of an OC circuit is determined by the system capacitance and the sink current of the driver.
> I think you read this part backwards.  The slew rate requirement is not
> a minimum slew rate but a maximum one.  That is, any modern transistor
> (probably ancient ones too) will be way too fast.  You have to do
> something to slow it down.  Still, I think this one is easily met as
> it's just a series resistor on the gate of the driver MOSFET working
> against the gate capacitance.  Some FPGAs have current limiting on their
> output which may obviate the need for the resistor even.

I don't see any max slew rate spec in the driver specs in the peripherals handbook.


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