Odd memory error in PDP-11/04

Noel Chiappa jnc at mercury.lcs.mit.edu
Wed Sep 7 12:46:25 CDT 2016

    > From: Paul Koning

    > Semiconductor memory, right?


    > A possible reason would be that the address drivers for that bit, or
    > the address decoders in that chip, are busted. The result would be that
    > reads and writes always touch the same address in the chip.

Oooh, good point. That's a better explanation of the symptoms than mine,
since it answers the thing that was confusing me ("why it can be either set
or reset with a write, but freezes in one state for reads").

A fully-populated 64KB MS11-J card has 4 rows of 16Kx1 chips, so if the
machine ever runs again, the first thing to check is to see if that bit at
040000 (or 0100000, if it's a larger than 32KB card) is tied to that bit at
0; if not, it's the addressing circuitry in the chip. (Looks like E75, but it
might be E72).

    > The fact that other bits repeat every 20 also suggests issues with
    > addressing logic.

That I don't think is a memory chip issue, since it causes the entire word to
repeat, and on that card, each bit of the word is in a separate chip.

    > From: Jim Stephens

    > Is there a hint as far as the affected hardware in that the ODT is
    > working, but the ram is not? The rom that is running ODT is also being
    > accessed for read correctly. 

Good point. So it's probably not something in the CPU that's repeating every
020 locations.

Also, IIRC, that ODT code doesn't use memory, it runs entirely out of the
registers. There's some good reason for that (probably to avoid messing with
the contents of memory), but maybe also so that it runs without working
memory - ISTR that we discussed this at one point here, but I'm too lazy to
look for the discussion. So that's why ODT runs even if the RAM isn't working.

Anyway, if the 020 problem is in the memory too, it's probably the A04 bus
receiver (E55), although it might be the address latch (E88, a 7475) or the
RAS/CAS mux (E99, 74S153). Step a would be to put a scope probe on the output
of the bus receiver (pin 2) and see if it's hopping up and down - if that,
that chip is OK, and the problem is further down the line.

    > I don't know if the rom path to the ODT code is different than the ram,

Yes. The ROM for the ODT is stored in the M9301 card (at least, if it's an
11/04, it's probably an M9301 - could be an M9312, too). The RAM is in
another card, an M7847 (MS11-J).

    > it is interesting that the console code is being fetched, along with
    > the data from the serial controller to communicate with the console
    > terminal

Which indicates that the UNIBUS is probably OK; the console serial is on yet
another card, the M7856 (DL11-W); the CPU, RAM, bootstrap and serial line all
talk to one another over the UNIBUS.


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