Meaning of "architecture width" - Re: 68K Macs with MacOS 7.5 still in production use...

tony duell ard at
Fri Sep 16 00:11:59 CDT 2016

> Why not have two concepts? They're free. Gordon Bell probably laid this
> out somewhere. Or Blaauw and Brooks.

In a talk on the HP9810 desktop calculator I said, somewhat tongue-in-cheek
that it could claim to be 1, 3, 4, 6, 8 or 16 bits.

The justifications for those are as follows : The processor has 16 bit registers.
It's bit serial, so the normal internal ALU and data path width is 1 bit. But it 
does BCD additions between the A (accumulator) and T (memory data) registers
a nybble (4 bits) at a time.

The memory system is odd, with hardware translating a read or write into 2 
cycles on successive locations. One location stores the odd bits, the other the
even bits. So the physical width of memory for things like the system stack
is 8 bits.

Even odder, the machine stores user programs as sequences of 6 bit keycodes.
User program memory is logically 6 bits wide. But because of the memory 
control system, such memory is physically 3 bits wide, user program memory
expansion consists of Intel 1103 (1K*1bit) DRAMs fitted in sets of 3. 

So : 
1 bit -- physical width of binary ALU and data paths
3 bits -- physical width of user program memory
4 bits -- physical width of BCD ALU and data paths
6 bits -- logical width of user program memory
8 bits -- physical width of data memory
16 bits -- logical width of data memory, physical width of CPU registers

Call it what you will :-)


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