PDP-11/84 Bootstrap for TSV05 (Dilog DU142)
paulkoning at comcast.net
Thu Aug 10 11:51:53 CDT 2017
> On Aug 10, 2017, at 12:24 PM, Ulrich Tagge <u.tagge at gmx.de> wrote:
> Am 10.08.2017 um 17:19 schrieb Paul Koning:
>>> On Aug 9, 2017, at 2:58 PM, Ulrich Tagge via cctalk <cctalk at classiccmp.org> wrote:
>>> Type a command then press the RETURN key: B MS0
>>> Trying MS0
>> You're getting an I/O error halt. That case is supposed to go to the HALT at 1114, which would mean you'd get a PC of 1116 shown in the message.
>> However... there's a bug in the bootstrap as documented in the manual. It shows BMI HALT at 1050, but the machine code is wrong. The displacement from the PC is 1114-1052 = 42, so the assembled instruction would be 100421. As written, the code is a BMI MES.
>> You should examine the TS controller CSR at 172522 (TSSR) to see what error flags are set.
> Hi Paul,
> Many thanks for you Help!
> Here is the content of 172522.
> Trying MS0
Does the console on your machine do 22 bit addressing? You may need to ask for the CSR by its full 22 bit address, so 17772522. The number you showed looks suspiciously like a powerup selftest memory check pattern.
> Please excuse, maybe my understanding is wrong: Does this mean content of address 001050 should be 100421 instead of 100422?
Yes, that's what I meant. Otherwise it branches to the first word of the message buffer, and if that's non-zero it wouldn't halt but do something different and probably rather strange.
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