8085 IO ports

dwight dkelvey at hotmail.com
Sat Jan 14 19:16:20 CST 2017

That is likely to cause bus contention. I don't see why you want to do that?

The processor thinks i is in control and you cause an I/O, read or write at a random time??

What machine are you talking about. Can you put your own EPROM in there with the port reads and writes so things are properly timed?


From: cctalk <cctalk-bounces at classiccmp.org> on behalf of Adrian Graham <witchy at binarydinosaurs.co.uk>
Sent: Saturday, January 14, 2017 12:01:32 PM
To: Discussion: On-Topic and Off-Topic Posts
Subject: 8085 IO ports

Hi folks,

STC Executel fun continues and I'm at the point where I'm fairly sure code
is running but it's stuck in a tight loop waiting for something to happen.

The 8085A reference tells me a non-memory I/O is signalled by IO/M going
high while it puts the port number on the address bus (0xE3 to 0xE8 in this
case), 8 bits on the data bus and sets S0/S1 to be WRITE. If that's the case
then this machine in its current state doesn't do any non-memory I/O - IO/M
is the only signal that stays low. It's not a failed CPU since I have 3
different ones and they all do this.

I've pondered if one of the 3 chips the IO/M signal goes to is pulling it
down; presumably I can test this by lifting the IO/M pin out of its socket
then briefly touching a 1Kohm resistor connected to +5V to the 3 inputs and
watch what the outputs do while the machine is running?

With my little logic analyser on the address bus it's continually active so
it's not a stuck bit either, at least not at the CPU. I can watch the
repetitive patterns while the code runs through 3 delay loops then the
patterns alter while it's off doing....something. All the 4116 RAM chips
seem to be OK too.

I'm also guessing things would be a lot easier if I had a memory map...


Binary Dinosaurs creator/curator
Www.binarydinosaurs.co.uk - the UK's biggest private home computer

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