Help identifying UNIBUS PDP-11 CPU upgrade

Noel Chiappa jnc at
Sat Jul 1 10:17:43 CDT 2017

    > From: Noel Chiappa

    > (One cable carries uclock, the other uPC data.)

Minor goof there; the low bits of the uPC are in one cable, along with the
"Manual Clock Enable" and "Manual Clock" signals; the other cable carries the
high bit/bits (depending on whether it's a KD11-E or KD11-EA) of the uPC.

This is because...

    > From: Mattis Lind

    > Actually it should work with the 11/04. The 04 does have one 10 pin
    > connector on the board.

Hi, thanks for catching that. I looked for a Berg header on an M7263 boards,
and didn't see one, which is what misled me.

It's actually just a group of bare pins (in the upper left hand corner of the

I looked for the connection in the KD11-D engineering drawings, but it's not
shown!  E.g. on page 7 of the drawings (center bottom) you can see "Manual
Clock Enable" and "Manual Clock" but they are shown as connected to backplane
pins (DS1 and DU1). The connector is only described on page 1 (upper left hand

So that explains the odd division of signals between the two cables: the
KD11-D in the -11/04 apparently has one less bit of uPC (smaller uprogram), so
its signals can all fit in one cable.

Just to create maximal confusion, in the KD11-EA, there's one more bit of uPC
than in the KD11-E, along with some other signals (e.g. "FP11-A Attached") in
the second cable: this is to allow support of the optional FP11-A floating
point unit, which seems to have a bunch of private ucode, in an extension to
the uaddress space.

The KY11-LB, although it pre-dates the KD11-EA, will probably still show the
uPC correctly with an FP11-A present, as it's apparently prepared to display
up to 4 bits from the 'high' connector.


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