USB Universal Floppy Disk controller
Dwight K. Elvey
dwight.elvey at amd.com
Mon Mar 14 13:55:34 CST 2005
>From: "woodelf" <bfranchuk at jetnet.ab.ca>
>Dwight K. Elvey wrote:
>> I've always been looking at using a DSP chip for this job.
>>I did expect to read parts of a track at a time and then
>>reassemble them as condensed data. Chips like the Analog
>>Devices 2181 have some 80Kbytes of onboard RAM. Although,
>>it can't all be used for storage at the same time and
>>some is needed for program space. These chips can be
>>implemented with a real minimum of outside circuits.
>>they even have a serial SPI that can be used to read
>>disk data at higher speeds. These processor run at 30 MIPs
>>plus. They can run some operations, such as data moving
>>to arrays in single cycles, including updating of pointers.
>>They can do as many as 5 operations in a single cycle.
>> The can bootstrap from simple slowspeed EPROM of FLASH.
>>One could easily connect one of these to that USB chip
>>that someone pointer to earlier.
>Look what you are doing is building a generic floppy disk controler.
>The only high speed device what you use to sync the data/clock pulses
>to the system cpu clock. The rest is software. I'd sooner use a CPLD
>designed for generic bit sampling but a PIC would also work with
>a digital data/clock seperator. Now would getting the people who do
>cat-weasel create a USB version be a better goal?
>Ben alias woodelf
>PS. What about hard-sectored floppy disks, that too may need reading
I think you are missing what I am saying. The SPI is just
a shift register that takes an external clock. It can be programmed
to automatically DMA transfer into memory. It is the perfect zero
additional logic circuit to use. You don't need to build a
data/clock separator or anything. Just sample the data.
One could even make the output SPI provide write data. These
chips are designed to load their programs from a single
flash or EPROM so the entire hardware requirement is almost
I see others on comp.os.cpm talk about using a 50MHz variant
of a Z80. I think most miss the point. These DSP's are 30 MIPS+
not just 50 MHz clocks. They have enormous capabilities in
a relatively small package. It was like they were designed for
this project. You don't need to create a CPLD since the hardware
part is already done for you.
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