Pinout for SED9421
ard at p850ug1.demon.co.uk
Sat Nov 26 18:23:25 CST 2005
> > Are you sure it does? In particular, are you sure the output of the stack
> > is not tri-stated and the lines driven by something else?
> I've just found another gate that I missed on my first look at the circuit...
> The Y_LOW and Y_HI/OPCODE latches are cleared to zero on a reset. That means
> the opcode being loaded on startup has a low LSB. That makes the read strobe
> for the register file inactive, and the GATE lines for the two address
> buffers (H6 and J6) active. They gate Y[11:0] onto the counter inputs and the
> counter's LOAD input gets strobed by DMALD. Cute trick...
This reminds me of the way the classic-PERQ loads its control store. The
only thing that can address the control store is the 2910 sequencer. And,
of course, that's needed to run the microprogram which is going (at least
in part) to load the control store, and so after writing to that word of
control store, you need to execute the next instruction in the program,
which is presumably nowhere near the location you've just written..
It goes something like that :
You load the S register (a register in the 2910) with the address of the
control store location you want to write
The instruction that loads the control store has one of the microword
fields set to a particular value to control the write logic. The
condition field must be set to TRUE, the jump field to GOTO S.
The instruction is executed. The sequencer outputs the address from the S
register, the RAM write line is pulsed. The new value is written to the
But the microcode data pipeline latches are not clocked at the end of the
insturction (as usual). The insturctions is therefore effectively
executed again (but other bits of the CPU are disabled). This time, the
condition input to the 2910 is forced into the deasserted state, so the
GOTO S operation effectively becomes a NEXT. The address of the next
location in the microprogram being executed is therefroe output by the
2910. This instruction is read, loaded into the pipeline latch and
executed as usual.
> This thing has logic tricks to rival Woz's IWM (Disk II) floppy controller...
Please do not compare an ingenious design with that almighty kludge.
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