FPGA VAX update
ajp166 at bellatlantic.net
Mon Oct 24 14:11:28 CDT 2005
>Subject: Re: FPGA VAX update
> From: William Donzelli <aw288 at osfn.org>
> Date: Mon, 24 Oct 2005 14:43:59 -0400 (EDT)
> To: "General Discussion: On-Topic and Off-Topic Posts" <cctalk at classiccmp.org>
>> The 8650 is all ECL, man. We're talking really fast gates here...
>The 8650 was pretty slow for an ECL machine, as I think it was just
>10K. That really is not a big step above something using 74ASxx series
>technology. 100K, MECL III, 10G and 10E were the fast ECLs.
>aw288 at osfn.org
Yep, 86xx was ECL10k and a little of the early ECLx (early next generation).
The 9000 was the ECL100K+ packaging. So an 86xx was still above 10nS for
a full adder with lookahead.
There is also something that came out of the RISC camp. The more stuff
running in (hopefully) lockstep (multiple microengines) the more work
on timing margins needs to be done. Critical paths for logic dominate
and system speed will be slower.
the MicroVAX-I was almost the other end of the spectrum. It was almost
how much can be taken out and still be a creditable vax. That simplification
was an important clue for the VAX on silicon (uV-II) as to hove much had
to be there and how fast.
I'd think if you simplify the 780 to eliminate the busses other than local
ones and then implement using new tech the scalar result could be quite fast.
However if the goal is to make a 780 with all the busses common to it for
the IO and storage you'll end up with a more logic to implement the busses
than the core CPU in hardware. One look at the microVAX series will show
even though the cpu was reduced to trivial number of chips the total board
space wraped around it was for busIO. the best contrast is the uVaxII (qbus)
and the uVAX2000. They are close in performance (exact same CPU) but miles
apart in power needed and chip count. This pattern occurs throughout the
industry with just about every cpu that comes to mind.
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