PDP-8 /e/f/m memory

Allison ajp166 at bellatlantic.net
Thu Aug 17 07:41:29 CDT 2006

>Subject: Re: PDP-8 /e/f/m memory
>   From: Don <THX1138 at dakotacom.net>
>   Date: Wed, 16 Aug 2006 11:41:47 -0700
>     To: General Discussion: On-Topic and Off-Topic Posts <cctalk at classiccmp.org>
>> I thought I'd said that.  Bit of work history, engineer and product 
>> engineer for a semi company that sold micros and ram.
>Work history doesn't help list readers since they can only read
>what you've *written* (except for those few clairvoyants sitting
>in the back row...)  :>

Most will not build unless supplied as a kit for $49.95.

>You neglected to note that Icc grading *between* CMOS static
>RAMs AT DC varies SUBSTANTIALLY.  Power consumption at operating
>frequency isn't an issue (here).  Rather, the difference between
>Icc(standby) on a "regular" 62256 (e.g.) and a "low power"

Yes, I know.  Does anyone care?

>You can buy even LARGER devices (e.g. > 1MB -- B not b)
>that will idle at *2* uA.
>I.e. the data retention time of a well designed BBSRAM
>circuit *is* limited to the shelf life of the battery
>powering it (during standby).  *But*, only if you select
>the right grade SRAM.

At 2ua a 3V 30mAH Li cell has a life of how many years?
At 20ua a 3V 30 mAH Li cell has a life of how many months?
At 2ma using two AA alkaline cells (Duracell) in hundreds of hours?

>In my reread of your comments, I don't see *that* mentioned.  :>
>(much of the 32KB devices you'll find in PC's and their ilk
>are not chosen for this very low Icc(standby) -- *especially*
>cache RAM!)

Doesnt matter!  if battery life were an issue I'd have brought 
it up.  However I specifically metnioned in another post that 
battery life or even battery backup was not an issue.

FYI: nearly all the previous commercial designs the ram array
was usually 2102s and even the LP version at DC was both heat 
and power intensive. Their power drain was measured in amps
for the array (96 2102s for one board).  B elieve it or not
they did provide for backup  (using large SLAs).

I'd point out that I have a bag full and some are very low power
I measured several for this and got less than 1ua at 3v and room
temp, outputs floating inputs grounded CS/ and OE/ negated.  You 
forget guarenteed specs vs whats likely supplied as yeild is often
to the better part.  That was only the CMOS cache rams pulled 
from old 486 boards of late generation (green). I have a very deep
new parts stock with a tubes of graded 62256 and other 
low power rams as well as CMOS logic.

>To put things in perspective, a 1F supercap charged *nominally*
>to 5V (use care here since supercaps typically don't have much
>margin for overcharge  :>) would discharge to 2V (the typical
>data retention voltage of a CMOS SRAM) in just 3000 *seconds*
>(less than an hour) with a 1mA retention current.  This could
>be extended to ~30hours using 25uA devices.  Using a *2*uA
>device can extend this to 2.5 weeks...

Read that as a battery would do far better. 

Back in 1981 when I first got my hands on a supercap
I evaluated them against Li primary cells. I wasn't 
impressed then or now. Super caps are just big (is capacity) 
caps and don't really hold a lot of energy.  They don't 
leak or do bad things as a rechargeable storage but a 1F 
super cap doesn't match a cr2016 or 2032 for total 
watthours of available energy.  As a result a 2032 coin 
cell would perform much better than a super cap and I've 
never seen one leak.  They are cheap and play with the 
dallas memory power management chips quite nicely.

>[have I done my math right?  Sorry, I'm just doing it in
>my head so I may slip a decimal or three... :> ]

Doesn't matter.  The board I'm doing is not backed up.  Even if 
it were it would be only short term backup as in minutes to 
hours so I could ride through a power "burp".  A few AA alkalines
in an external box would do that very well.

This is a PDP-8f and it weighs in at a mere 60 pounds for the CPU 
box and there is a open 13"x4"x5" (60 cubic inches) cavity where 
a suitable enclosed and even properly vented (external to the 
CPU case) box could be placed containing a large battery and 
charge circuit.  Right above the PS (in it's own box) and far
enough away from the bus. 

If I need power fail backup I have 20k of core!  What I want is 32k
of semi to play with for large OS stuff and still leave room on the
board for an IDE interface and maybe even a 2.5" drive or CF.


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