Q22 BUS parity check?
ard at p850ug1.demon.co.uk
Wed Dec 13 16:34:03 CST 2006
> I read the Q22 specification (search "Q22 specification" on this page:
> http://www.chd.dyndns.org/qbus_ide/ ) but the parity check function is still
> not clear to me. My questions are,
> 1. Is there parity check when interrupt vector is read ?
> 2. Is there parity check if IO page is read?
> 3. What is the polarity of the parity bit?
> Those questions are not answered from the specification. Any expert here?
Assuming it's like Unibus (and I am pretty sure it is), I think your
confusion coimes from not realising what device actually does the partity
What it really is is that a memory board can signal an error on read,
which was often down by a parity check. It _could_ be done by, say,
having ECC memory and having the error signals if there were too many bit
errors to correct. It's tbe memory board (or memory controller) that
checks parity, nnt any part of the CPU hardware.
So to answer your questions:
1) There could be, it depends on the memory board where the vector is
2) Not normally, I don't think any standard I/O devices checked parity on
3) Depends on the memory board, etc.
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