Grant chain (was: New 11/24, what to do first? More info.)
ard at p850ug1.demon.co.uk
Sun Jan 8 12:52:54 CST 2006
> In article <f4eb766f0601071639h1db56e83p909fdd0766b8374c at mail.gmail.com>,
> Ethan Dicks <ethan.dicks at gmail.com> writes:
> > Check your backplane for NPR wires, especially if you have any empty
> > slots. As we rehash here in the list from time to time, you have to
> > have a complete grant chain both for interrupts and for DMA in a
> > Unibus box for it to boot and run properly.
> > You might have to lay hands on some grant cards if you have empty slots.
> I have seen grant cards on ebay but I'm not exactly sure what purpose
> they serve. Can someone enlighten me? Also, what are "NPR wires"?
Strictly 'NPR wires' shold be 'NPG' wires. NPG stands for Non Processor
Grant (and NPR is Non Processor Request). It's much the same as DMA.
On the Unibus, an interrupt goes like that :
1) The intterupting device assets one of the Bus Request (BR) lines
2) If the priority levels is set appropriately, the processor (or more
strictly the arbitor) asserts the approriate Bus Grant (BG) line. Now the
BG lines are not bussed between all the slots. The arbitor drives the
inputs on the first slot, the device in the first slot drives the inputs
on the second slot, and so on. If a device is not the source of the Bus
Request, it passes the grant on, If it is, then it handles the interrupt,
and doesn't pass on the grant. This is a sort of priority scheme, devices
neare the arbitor have higher priority.
3) The interrupting devices asserts SACK (Select ACKnowledge). The
arbitor de-asserts BG. The interrupting device now has control of the bus
4) The interrupting device now outputs a vevtor onto the data lines,
asserts the Interrupt line, and asserts MSYN (IIRC). The processor
asserts SSYN to say it's taken the vector.
5) The device deasserts SACK, the processor now has control of the bus
again, it executes the interrupt service routine.
Non Processor Requests are similar. A device asserts NPR, the arbitor
asserts NPG, the device asserts SACK, at which point it has the bus and
can output addresses, data, etc to access memory.
Now, the problem comes in the fact that the Grant lines (there are a
total of 5, 4 BG's and NPG) are not bussed, they're daisy-chained. If you
have an empty slot, you need to link the input contacts to the output
contacts on that slot, so as to pass on the grant lines to the next slot
on the backplane.
Originally, there was no way to do NPR operations from a single-slot
Small Periperhal Controller. So there were only the BG lines, they are on
part of connector D. DEC made a little sqare PCB with some
shorted-together fingers on one side that you put into connector D to
link the BG Inputs to the BG Outputs. That was the original Grant
Soon afterwards, DEC put the NPG line on the Small Periperal Controller
SLot, using 2 contacts of connector C. Since the grant continuity card
didn't fit into that connector, and since NPR devices on one card were
not common anyway, the NPG signal was passed on by a wire-wrapped jumper
on the back of the backplane. It was fitted at the factory, you cut it
(carefully!) if you put an NPR device in that slot, you re-wrapped it if
you took the NPR decice out).
Much later on, DEC made a dual-height Grant Continuity card which fitted
into both connectors C and D. Needless to say this one links over all the
BG and the NPG signals.
But the problems are not over. Many older Small Peripheral Controller
cards that do not do NPR trnasfers have nothing connected to the NPG In
and Out fingers of connector C. If you put one of those in a slot, you
have to put the wire-wrapped jumper in place, or solder a wire on
the board between the appropriate fingers.
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