OMTI parallel port interface hack

Allison ajp166 at bellatlantic.net
Sun Jul 9 16:30:19 CDT 2006


>
>Subject: Re: OMTI parallel port interface hack
>   From: ard at p850ug1.demon.co.uk (Tony Duell)
>   Date: Sun, 09 Jul 2006 21:20:12 +0100 (BST)
>     To: cctalk at classiccmp.org
>
>> 
>> The typical application of most 8255's, I'm going to guess is that they're
>> initialized at the start of an application or when the computer is booted
>> and the mode is never fiddled with thereafter.
>
>As I mentioned in my reply to Allison, it's worse than that.
>
>On reset, the line is an input, so a TTL input connected to it will treat 
>it as high (it would be good practice to add a pull-up resistor, sure)
>
>On writing to the mode register, that TTL input will be forced low
>
>Then you might make it high again.
>
>Your external circuit has to be happy with this (it can't assume the line 
>will stay high as the chip is initialised). The other parallel chips 
>(e.g. 68721, 6522) don't have this problem, with those, you can write to 
>the output port register and make outputs effectively 1 _before_ writing 
>to the direction register. Then if you have an exetrnal pull-up, or 
>assume a TTL input floats high (naughty!), you will not get a momentary 
>low glitch on the line.

The 6522 is sometimes nice but hard to find. and for many the 68721 is
even harder to find.

As someone said, 8255s, the roads paved with them.  Also how often do 
you have to turn a port around?  Apps where I needed that I found that 
there were other approaches that worked better.

>> 
>> Does the 8251 USART also have some sort of strange initialization problem?
>> It's been a long time since I've used one, but I seem to recall a gotcha.
>
>IIRC, it's impossible in gnneral to force it into a known state. If 
>you're setting it up for synchronous operation and forget how many of the 
>initialisation bytes you've sent it, there's no software way to force it 
>into a known state from where you can start the initialisation again (a 
>hardware reset will do it, of course).

Most sync mode chip setups are a PITA!

If you forget how many init bytes you sent, your software is broken
or Alzhimers.  Also issuing a reset command after a data port read
works.  The 8251/9551/2651 and related varients are all annoying 
about that.  In general I dislike chips that need to be pumped with a 
string of bytes to one address for init.  However most behave and it's 
not that hard to sort out.  However since most of the S100 crates I have
and many systems I've built 8251s are familiar and used as I still 
have tubes of them.  However it's not my first choice for Sync ops
though for async its fine.



Allison

>
>-tony


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