The 2N2/256-BSCP [was: Homebrew Drum Computer]

[Jim Battle]

Robert Nansel wrote:
> That's BSCP as in "Bit-Serial Computer Project." The 2N2/256 part of the 
> name is a nod to ham homebrewer Jim Kortge (K8IQY) who designed a QRP 
> rig called the 2N2/40 for a design contest about ten years ago. The 
> contest objective was to design and build a functional amateur radio 
> transceiver, using a maximum of twenty-two 2N2222 type transistors.
> 
> 
> 
> Whether it uses drums, disks, or ultrasonic delay lines, my challenge is:
> 
>      1) To build a complete functional computer, including memory, using 
> no more than 256 2N2222-ish transistors (plus scads of diodes, 
> resistors, etc.).
> 
>      2) Use no ICs or other parts that wouldn't have been available to 
> hobbyists ca. 1965.
> 
>      3) Must be transportable in the boot of a mid-size sedan (i.e. a 
> few roughly 350mm cubical modules).
> 
> 
> 
> Anybody up for a contest to see who can design the most powerful 
> general-purpose digital computer given these constraints?  I guess we'd 
> have to figure out what "powerful" means in this context, given that 
> it's likely never to exceed a few KIPS.
> 
> I'm prototyping DTL NAND gates and flip-flops today...

Rather than a magnetic drum, I think a much more achievable contraption 
is a drum that uses capacitance for storage.  The density would be much 
lower, but it would be more tractable, I think.

Inside a hollow cylinder mount rows of capacitors.  One side of all 
capacitors would be connected in common to ground, which conveniently 
would also be the axle that would be spinning the drum.  The other side 
of each cap would punch through the cylinder wall with a brass stud.  A 
row of brushes would make contact with a row of caps at a given time.

Just like a DRAM, you'd have to read, sense, and refresh the caps on 
each read, and every so often in case a given word wasn't read for a 
while.  To make things simple, read, sense, and refresh every rotation 
to get rid of any special cases.

If you don't want word parallel access, then just have the studs from a 
given brush represent the bits of a word.  Different brushes are used to 
select which word you care to access.  16 words of 16 bits should be 
do-able.  Thinking a bit more about this, it should be possible to make 
a single cross section "slice", and then laminate these to as many words 
as you'd like.  The first slice would be unique -- it wouldn't have any 
storage, but instead would be the clock source, and some indication of 
the rotation phase (perhaps just a "this is bit 0" signal).  By making 
the "studs" on this clock track smaller and centered relative to the 
ones used for accessing the data, you should be able to use it to gate 
the r/m/w timing.

It sure isn't going to do 3000 RPM, but perhaps 1/10 of that speed, and 
it will make a nice clatter I suppose.  But since you are setting a 
limit of 256 transistors, you shouldn't really be aiming for high 
performance anyway.