Memory/cache on the 11/70

bfranchuk at jetnet.ab.ca bfranchuk at jetnet.ab.ca
Wed Dec 31 12:26:10 CST 2008


Guy Sotomayor wrote:

> As far as pricing goes, a 4 layer board (you *really* want at least 4 
> layers here) + components + assembly & test should be < $1000.  How much 
> less I don't know.  The target for my unibus memory board is ~$500 
> (fully assembled & tested + some profit).  Given that this wouldn't need 
> unibus transceivers (hideously expensive when you can find them) I would 
> expect this to be in the same ball park especially if it can be 
> contained on a quad board.

> The other issue with not replacing the cache, is that the verilog to 
> implement this would *much* simpler (ie it can probably be completed 
> faster).

TTL ... and a few gals... I trust hardware more than software is my view point.
Real cache memory   32k*8 is about 15ns access time in a skinny 28 pin package.
I am just not sure how much memory you can get on a card however ... Sigh.

> TTFN - Guy
> 
> 




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